The present invention relates to a semiconductor device having a multilayer wiring structure. The present invention is particularly applied to a system LSI manufactured using an IP core.
The recent development of the process technique has accelerated the microstructure and high integration of semiconductor elements. Following them, it has become possible to mount an entire system on one chip. A circuit constituting the system is, however, large in scale and complicated. To design such a circuit from a gate level, considerable resources are required, which is disadvantageous in efficiency.
To enhance LSI design efficiency including the above-stated disadvantage, a design method for recycling past design properties and assembling them on a chip for a general-purpose block is gradually spread.
Meanwhile, such design properties are referred to as IP's (Intellectual Properties), stored as an IP core in a library and freely picked up as required.